a) Field of the Invention PA1 b) Description of the Related Art
The present invention relates to a semiconductor device, and more particularly to a static random access memory (SRAM) semiconductor device.
In SRAMs, two series circuits of a driver transistor and a load are connected between a supply voltage line and a ground voltage line. The interconnection point of the driver transistor and load is connected to the control terminal of the other driver transistor, and connected via a transfer gate transistor to a bit line. The control terminal of the transfer transistor is connected to a word line. The loads are formed by resistors or transistors.
For example, driver transistors and transfer transistors are made of MOS transistors formed on the surface of a Si substrate, and loads are made of polycrystalline silicon thin film transistors (TFT) formed on an insulating film on the Si substrate.
In order to improve the degree of integration, it is desired to reduce the area of an SRAM cell and miniaturize each transistor. In a memory read operation, the driver transistor is connected via the transfer transistor to the bit line. If the bit line takes a high potential and the driver transistor is in an on-state, a voltage between the bit line and ground is divided by the transfer transistor and driver transistor. If the drive performance of the driver transistor is not sufficient, the potential at the interconnection point rises, resulting in an unstable condition and reversion of a memory state.
The drive performance ratio between the transfer transistor and driver transistor is quite important in terms of an operating margin of an SRAM cell (refer, for example, to E. Seevinck et al., IEEE J. Solid-State Circuits, Vol.SC-22, No.5, 1987, pp.748-754). This drive performance ratio is generally called a cell ratio.
In order to stabilize the operation of a memory cell, it is necessary to make the cell ratio sufficiently large so that the operation of a driver transistor is stabilized even during the on-state of the transfer transistor. As the operating voltage lowers, the necessary cell ratio becomes large.
In order to increase the cell ratio, it is generally necessary to increase the channel width of a driver transistor. However, increasing the channel width of a driver transistor results in an increase of the memory cell area.
Recent memory cells have a considerably high degree off integration. There is a tendency that an operation voltage is lowered so as to reduce the power dissipation. Even if the operating voltage is lowered, a larger cell ratio is required to provide a stable operation of an SRAM cell.
If the channel width of a driver transistor is made wider to increase the cell ratio, the memory cell area becomes very large which restrains high integration.
To solve this problem, it has been proposed to add a resistor to the source of a transfer transistor (refer or to H. Ohkubo et al., IEDM Technical Digest, 1991, pp.481-484).
This technique which suggests to add a resistor to the source of a transfer transistor of an SRAM, is very effective for stabilizing the operation of SRAM. According to the study by the present inventors, however, the characteristics of an SRAM cell depend greatly on process parameters.